IR2213(S)PbF Datasheet by Infineon Technologies

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IR2213(S)PBF
1
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April 26, 2016
High and Low Side Driver
Ordering Information
Features
Floating channel designed for bootstrap operation
Fully operational to +1200 V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 12 V to 20 V
Undervoltage lockout for both channels
3.3 V logic compatible
Separate logic supply range from 3.3 V to 20 V
Logic and power ground ±5 V offset
CMOS Schmitt-triggered inputs with pull-down
Cycle by cycle edge-triggered shutdown logic
Matched propagation delay for both channels
Outputs in phase with inputs
Description
The IR2213(S) is a high voltage, high speed power
MOSFET and IGBT driver with independent high and low
side referenced output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. Logic inputs are compatible with
standard CMOS or LSTTL outputs, down to 3.3 V logic.
The output drivers feature a high pulse current buffer stage
designed for minimum driver cross-conduction.
Propagation delays are matched to simplify use in high
frequency applications. The floating channel can be used
to drive an N-channel power MOSFET or IGBT in the high
side configuration which operates up to 1200 V.
Product Summary
1200 V
1.7 A / 2 A
12 V 20 V
280 ns / 225 ns
30 ns
Package Options
16 Lead SOIC 14 Lead PDIP
(Wide Body)
Base Part Number
Package Type
Standard Pack
Orderable Part Number
Form
Quantity
IR2213SPBF
SO16WB
Tube
45
IR2213SPBF
IR2213SPBF
SO16WB
Tape and Reel
1000
IR2213STRPBF
IR2213PBF
PDIP14
Tube
25
IR2213PBF
IEBR 912m 1200V DD HIN SD LIN ss cc - www.irf.com
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April 26, 2016
Typical Connection Diagram
Refer to Lead Assignments for correct pin configuration. This/These diagram(s) show electrical connections
only. Please refer to our Application Notes and Design Tips for proper circuit board layout
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April 26, 2016
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are
measured under board mounted and still air conditions.
Recommended Operating Conditions
Symbol
Definition
Min.
Max.
Units
VB
High Side Floating Supply Voltage
-0.3
1225
V
VS
High Side Floating Supply Offset Voltage
VB - 25
VB + 0.3
VHO
High Side Floating Output Voltage
VS - 0.3
VB + 0.3
VCC
Low Side Fixed Supply Voltage
-0.3
25
VLO
Low Side Output Voltage
-0.3
VCC + 0.3
VDD
Logic Supply Voltage
-0.3
VSS + 25
VSS
Logic Supply Offset Voltage
VCC - 25
VCC + 0.3
VIN
Logic Input Voltage (HIN, LIN & SD)
VSS - 0.3
VDD + 0.3
dVs/dt
Allowable Offset Supply Voltage Transient (Figure 2)
50
V/ns
PD
Package
Power Dissipation
@ T
A
+25˚C
@ T
A
+25°C
(14 Lead PDIP)
(14 Lead PIDP)
1.3
W
(16 Lead SOIC)
1.0
RTHJA
Thermal Resistance, Junction to
Ambient (14 Lead PDIP)
(14 Lead PDIP)
75
°C/W
(16 Lead SOIC)
100
TJ
Junction Temperature
125
°C
TS
Storage Temperature
-55
150
TL
Lead Temperature (Soldering, 10 seconds)
300
The Input / Output logic timing diagram is shown in Figure 1. For proper operation the device should be used
within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15 V
differential.
Symbol
Definition
Min.
Max.
Units
VB
High Side Floating Supply Absolute Voltage
VS + 12
VS + 20
V
VS
High Side Floating Supply Offset Voltage
1200
VHO
High Side Floating Output Voltage
VS
VB
VCC
Low Side Fixed Supply Voltage
12
20
VLO
Low Side Output Voltage
0
VCC
VDD
Logic Supply Voltage
VSS + 3
VSS + 20
VSS
Logic Supply Offset Voltage
-5 ††
5
VIN
Logic Input Voltage (HIN, LIN & SD)
VSS
VDD
Logic operational for VS of -5 to +1200V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-
3 for more details).
††
When VDD<5V, the minimum VSS offset is limited to -VDD
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April 26, 2016
Dynamic Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15 V, CL = 1000 pF, TA = 25 °C and VSS = COM unless otherwise specified. The dynamic
electrical characteristics are measured using the test circuit shown in Figure 3.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
ton
Turn-On Propagation Delay
280
ns
VS = 0V
toff
Turn-Off Propagation Delay
225
VS = 1200V
tsd
Shutdown Propagation Delay
230
VS = 1200V
tr
Turn-On Rise Time
25
tf
Turn-Off Fall Time
17
MT
Delay Matching, HS & LS Turn-
On/Off
30
Static Electrical Characteristics
VBIAS (VCC, VBS, VDD) = 15 V, TA = 25 °C and VSS = COM unless otherwise specified. The VIN, VTH and IIN
parameters are referenced to VSS and are applicable to all three logic input leads: HIN, LIN and SD. The VO and
IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
VIH
Logic “1” Input Voltage
9.5
V
VIL
Logic “0” Input Voltage
6.0
VOH
High Level Output Voltage, VBIAS - VO
1.2
IO = 0A
VOL
Low Level Output Voltage, VO
0.1
IO = 0A
ILK
Offset Supply Leakage Current
50
µA
VB = VS = 1200V
IQBS
Quiescent VBS Supply Current
125
230
VIN = 0V or VDD
IQCC
Quiescent VCC Supply Current
180
340
VIN = 0V or VDD
IQDD
Quiescent VDD Supply Current
15
30
VIN = 0V or VDD
IIN+
Logic “1” Input Bias Current
20
40
VIN = VDD
IIN-
Logic “0” Input Bias Current
1.0
VIN = 0V
VBSUV+
VBS Supply Undervoltage Positive
Going
Threshold
8.7
10.2
11.7
V
VBSUV-
VBS Supply Undervoltage Negative
Going
Threshold
7.9
9.3
10.7
VCCUV+
VCC Supply Undervoltage Positive
Going
Threshold
8.7
10.2
11.7
VCCUV-
VCC Supply Undervoltage Negative
Going
Threshold
7.9
9.3
10.7
IO+
Output High Short Circuit Pulsed
Current
1.7
2.0
A
VO = 0V, VIN = VDD
PW
10 µs
IO-
Output Low Short Circuit Pulsed
Current
2.0
2.5
VO = 15V, VIN = 0V
PW
10 µs
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IR2213(S)PBF
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April 26, 2016
Functional Block Diagram
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Lead Definitions
Symbol
Description
VDD
Logic Supply
HIN
Logic Input for High Side Gate Driver Output (HO), In Phase
SD
Logic Input for Shutdown
LIN
Logic Input for Low Side Gate Driver Output (LO), In Phase
VSS
Logic Ground
VB
High Side Floating Supply
HO
High Side Gate Drive Output
VS
High Side Floating Supply Return
VCC
Low Side Supply
LO
Low Side Gate Drive Output
COM
Low Side Return
Lead Assignments
7
6
5
4
HO
VDD
8
9
10
11
VS
VB
HIN
SD
3
2
1
COM
VCC
LO
LIN
12
13
14
VSS
8
7
6
HO
VDD
9
10
11 VS
VB
HIN
SD
5
4
3
VCC
LIN
12
13
14
VSS 2
1
COM
LO
15
16
14-Lead PDIP
16-Lead SOIC
(Wide Body)
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IR2213(S)PBF
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© 2016 International Rectifier
April 26, 2016
Application Information and Additional Information
OUTPUT
MONITOR
HO
10µF 0.1µF
VCC = 15V
10KF6
0.1µF
10KF6
10KF6
200µH
+ 100µF
IRF820
HV = 10 to 1200V
dVS
dt
<50 V/ns
VB
VCC
VDD
HIN
SD
LIN
LO
HO
VS
COMVSS
Figure 1. Input / Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
HO
10µF 0.1µF
VCC = 15V
0.1µF
VB
VCC
VDD
HIN
SD
LIN
LO
HO
VS
COMVSS
HIN
SD
LIN LO
CL
CL
10µF +
-
15V
VB
VS
(0 to 1200V)
10µF
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
Figure 5. Shutdown Waveform Definitions
Figure 6. Delay Matching Waveform Definitions
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April 26, 2016
Figure 7A. Turn-On Rise Time vs. Temperature
Figure 7B. Turn-On Rise Time vs. Voltage
Figure 8A. Turn-Off Fall Time vs. Temperature
Figure 8B. Turn-Off Fall Time vs. Voltage
Figure 9A. Logic “1” Input Threshold vs. Temperature
Figure 9B. Logic “1” Input Threshold vs. Voltage
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IR2213(S)PBF
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April 26, 2016
Figure 10A. Logic “0” Input Threshold vs. Temperature
Figure 10B. Logic “0” Input Threshold vs. Voltage
Figure 11A. High Level Output vs. Temperature
Figure 11B. High Level Outputs vs. Voltage
Figure 12A. Low Level Output vs. Temperature
Figure 12B. Low Level Output vs. Voltage
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IR2213(S)PBF
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April 26, 2016
Figure 13A. Offset Supply Current vs. Temperature
Figure 13B. Offset Supply Current vs. Voltage
Figure 14A. VBS Supply Current vs. Temperature
Figure 14B. VBS Supply Current vs. Voltage
Figure 15A. VCC Supply Current vs. Temperature
Figure 15B. VCC Supply Current vs. Voltage
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IR2213(S)PBF
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April 26, 2016
Figure 16A. VDD Supply Current vs. Temperature
Figure 16B. VDD Supply Current vs. VDD Voltage
Figure 17A. Logic “1” Input Current vs. Temperature
Figure 17B. Logic “1” Input Current vs. VDD Voltage
Figure 18A. Logic “0” Input Current vs. Temperature
Figure 18B. Logic “0” Input Current vs. VDD Voltage
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Figure 19. Maximum VS Negative Offset vs. VBS Supply
Voltage
Figure 20. Maximum VSS Positive Offset vs. VCC Supply
Voltage
Figure 21. IR2213S vs. Frequency (IRFBC20)
Rgate=33Ω, VCC=15V
Figure 22. IR2213S vs. Frequency (IRFBC30)
Rgate=22Ω, VCC=15V
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IR2213(S)PBF
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April 26, 2016
Figure 23. IR2213S vs. Frequency (IRFBC40)
Rgate=15Ω, VCC=15V
Figure 24. IR2213S vs. Frequency (IRFBC50)
Rgate=10Ω, VCC=15V
Figure 25. IR2213 vs. Frequency (IRFBC20)
Rgate=33Ω, VCC=15V
Figure 26. IR2213 vs. Frequency (IRFBC30)
Rgate=22Ω, VCC=15V
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IR2213(S)PBF
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April 26, 2016
Figure 27. IR2213 vs. Frequency (IRFBC40)
Rgate=15Ω, VCC=15V
Figure 28. IR2213 vs. Frequency (IRFBC50)
Rgate=10Ω, VCC=15V
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IR2213(S)PBF
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April 26, 2016
Package Details
16-Lead SOIC (wide body)
IEBR LOADED TAPE m3) DIRECTION NOTE CONTROLLING DIMENSION IN MM CARRIER TAPE DIMENSION FOR16$DICW In“ 17 —-||——" REEL DIMENSIONS FDR1630|CW MeIrIt Imperml Code Mm Max MIn Max A 1190 121a 0463 0476 B 3 so 410 0153 0161 c 1570 163a 061a 0641 D 7 4o 7 so u 291 u 299 E 1030 110a 0425 0433 F man man u417 U425 G 1 50 nla u 059 "In H 1 50 150 u 059 u 052 _.| |._F MeIrI: Imperml Code Mm Max MIn Max A 32960 33u25 12976 130m B 20 95 2145 0824 0844 C 1230 132a 0503 0519 D 1 95 245 u 767 u 096 E 9800 1u2 no 3858 4015 F n/a 22 4n nm a 5131 G 1850 211m 0728 uaau H 1640 1134a 0645 0724 com - WWW.
IR2213(S)PBF
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Tape and Reel Details, SO16WB
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April 26, 2016
Part Marking Information
IR2213
IR logo
YWW ?
Part number
Date code
Pin 1
Identifier
Lot Code
(Prod mode
4 digit SPN code)
Assembly site code
Per SCOP 200-002
? XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
14-Lead PDIP
IR2213S
IR logo
YWW ?
Part number
Date code
Pin 1
Identifier
Lot Code
(Prod mode
4 digit SPN code)
Assembly site code
Per SCOP 200-002
? XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
16-Lead SOIC (wide body)
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April 26, 2016
Qualification Information
Qualification Level
Industrial††
(per JEDEC JESD 47)
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Moisture Sensitivity Level
SOIC16WB
MSL3†††
(per IPC/JEDEC J-STD 020)
PDIP14
Not applicable
(non-surface mount package style)
RoHS Compliant
Yes
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
††
Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
†††
Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105

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