2ED020I12-F2 Datasheet by Infineon Technologies

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Industrial Power Control
Final Data Sheet
Rev. 2.0, 2012-06-05
2ED020I12-F2
Dual IGBT Driver IC
EiceDRIVER™
Edition 2012-06-05
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2012 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
infineon
EiceDRIVER™
2ED020I12-F2
Final Data Sheet 3 Rev. 2.0, 2012-06-05
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,
EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™,
MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™,
PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™,
SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™, SOLID FLASH™, TEMPFET™, thinQ!™,
TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,
PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR
development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,
FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of
Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data
Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of
MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics
Corporation. Mifare™ of NXP. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™
of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc.,
OmniVision™ of OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc.
RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc.
SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden
Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA.
UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™
of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of
Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Revision History
Page or Item Subjects (major changes since previous revision)
Rev. 2.0, 2012-06-05
o/_ Inflneon
EiceDRIVER™
2ED020I12-F2
Final Data Sheet 4 Rev. 2.0, 2012-06-05
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.2 Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.3 Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3.1 Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3.2 READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.3.3 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.3.4 Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.4 Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.5 Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6 External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6.1 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6.2 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.6.3 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
4.7 RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5 Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.2 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.3 Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.1 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.2 Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.4.3 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.4.4 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.4.5 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4.6 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4.7 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.4.8 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6 Timing Diagramms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table of Contents
o/_ Inflneon
EiceDRIVER™
2ED020I12-F2
Final Data Sheet 5 Rev. 2.0, 2012-06-05
Figure 1 Typical Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2 Block Diagram 2ED020I12-F2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 3 PG-DSO-36-58 (top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4 Application Example Bipolar Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5 Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6 Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 7 Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8 DESAT Switch-Off Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 9 UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 10 PG-DSO-36-58 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of Figures
o/_ Inflneon
EiceDRIVER™
2ED020I12-F2
Final Data Sheet 6 Rev. 2.0, 2012-06-05
Table 1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 3 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 4 Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 5 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 6 Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 7 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 8 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 9 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 10 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 11 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 12 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
List of Tables
@
Product Name Gate Drive Current Package
2ED020I12-F2 ±2 A PG-DSO-36-58
EiceDRIVER™
Dual IGBT Driver IC 2ED020I12-F2
Final Data Sheet 7 Rev. 2.0, 2012-06-05
1Overview
Main Features
Dual channel isolated IGBT Driver
For 600V/1200 V IGBTs
2 A rail-to-rail output
• Vcesat-detection
Active Miller Clamp
Product Highlights
Coreless transformer isolated driver
Galvanic Insulation
Integrated protection features
Small footprint
Suitable for operation at high ambient temperature
Typical Application
AC and Brushless DC Motor Drives
High Voltage DC/DC-Converter
• UPS-Systems
• Welding
Description
The 2ED020I12-F2 is a galvanic isolated dual channel IGBT driver in PG-DSO-36-58 package that provides two
fully independent driver outputs with a current capability of typically 2A.
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.
The 2ED020I12-F2 provides several protection features like IGBT desaturation protection, active Miller clamping
and active shut down.
@ineon
EiceDRIVER™
2ED020I12-F2
Overview
Final Data Sheet 8 Rev. 2.0, 2012-06-05
Figure 1 Typical Application
DESATLS
OUTLS
CPU
INHS+, INHS-,
/RSTHS
/FLTHS,
RDYHS
GND1
VCC1HS
VEE2HS
GND2LS
VCC1LS
INLS+, INLS-,
/RSTLS
/FLTLS,
RDYLS
VEE2LS
High Side
Low Side
VCC2LS
CLAMPLS
DESATHS
OUTHS
GND2HS
VCC2HS
CLAMPHS
2
2
2
3
3
3
EiceDRIVERTM
2ED020I12-F2
@ineon
EiceDRIVER™
2ED020I12-F2
Block Diagram
Final Data Sheet 9 Rev. 2.0, 2012-06-05
2 Block Diagram
Figure 2 Block Diagram 2ED020I12-F2
INHS+
INHS-
RDYHS
/RSTHS
/FLTHS
VCC1HS
NC
2
3
4
5
6
7
8
9
35
34
33
32
31
30
29
28
OUTHS
VEE2HS
GND2HS
CLAMPHS
VCC2HS
not existing
DESATHS
&0
0
0
/RSTHS LOGIC TX
RX
LOGIC
/FLTHS
UVLO
TX
RX
VEE2HS
VCC2HS
LOGIC
LOGIC
UVLO
RDY_LOOP
Δt
Δt
GND1 136 VEE2HS
INLS+
INLS-
RDYLS
/RSTLS
/FLTLS
VCC1LS
11
12
13
14
15
16
17
27
26
25
24
23
22
21
20
VEE2LS
CLAMPLS
GND2LS
DESATLS
OUTLS
&0
0
0
/RSTLS LOGIC TX
RX
LOGIC
/FLTLS
UVLO
TX
RX
VEE 2LS
LOGIC
LOGIC I3
DESAT
UVLO
RDY_LOOP
Δt
Δt
9V
K3
18 19 VEE2LS
GND2LS
R
VCC2LS
10NC
Low Side High Side
GND1
GND1
GND1
not existing
not existing
not existing
VEE2LS
VCC2LS
2V
VEE 2HS
2V
I3
DESAT
9V
K3
GND2HS
R
VCC2HS
VCC2LS
@neon
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Configuration
Final Data Sheet 10 Rev. 2.0, 2012-06-05
3 Pin Configuration and Functionality
3.1 Pin Configuration
Remark: xxxHS and xxxLS at the end of pin name only indicate an order for description, both drivers are isolated
and could be used as high side or low side without any preference.
Table 1 Pin Configuration
Pin
No.
Name Function
1 GND1 Common ground input side
2 INHS+ Non inverted driver input high side
3 INHS- Inverted driver input high side
4 RDYHS Ready output high side
5 /FLTHS Inverted fault output high side
6 /RSTHS Inverted reset input high side
7 VCC1HS Positive power supply input high side
8 GND1 Common ground input side
9 NC Not used, internally connected to Pin 10
10 NC Not used, internally connected to Pin 9
11 GND1 Common ground input side
12 INLS+ Non inverted driver input low side
13 INLS- Inverted driver input lowside
14 RDYLS Ready output low side
15 /FLTLS Inverted fault output low side
16 /RSTLS Inverted reset input low side
17 VCC1LS Positive power supply input low side
18 GND1 Common ground input side
19 VEE2LS Negative power supply low side driver
20 DESATLS Desaturation protection low side driver
21 GND2LS Signal ground low side driver
22 VCC2LS Power supply low side driver
23 OUTLS Output low side driver
24 VEE2LS Negative power supply low side driver
25 CLAMPLS Miller clamping low side driver
26 Pin not existing, cut out
27 Pin not existing, cut out
28 Pin not existing, cut out
29 Pin not existing, cut out
30 DESATHS Desaturation protection high side driver
31 VEE2HS Negative power supply high side driver
3:33:33 33:33:: O EEEEEEEEEEEEEEEEEE
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Functionality
Final Data Sheet 11 Rev. 2.0, 2012-06-05
Figure 3 PG-DSO-36-58 (top view)
3.2 Pin Functionality
Remark: xxxHS and xxxLS at the end of pin name only indicate an order for description, both drivers are isolated
and could be used as high side or low side without any preference.
GND1
Common ground connection of the input side.
INHS+, INLS+ Non Inverting Driver Input
INxx+ control signal for the driver output if INxx- is set to low (The IGBT is on if INxx+ = high and INxx– = low).
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal pull-down-resistor
ensures IGBT off-state.
32 GND2HS Signal ground high side driver
33 VCC2HS Power supply high side driver
34 OUTHS Output high side driver
35 CLAMPHS Miller clamping high side driver
36 VEE2HS Negative power supply high side driver
Table 1 Pin Configuration (cont’d)
Pin
No.
Name Function
RDYHS
/FLTHS
INHS+
VCC1HS
GND1
INHS-
GND1
NC
/RSTHS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
VCC1LS
NC
GND1
GND1 VEE2LS
DESATLS
GND2LS
VCC2LS
OUTLS
VEE2LS
CLAMPLS
CLAMPHS
DESATHS
VEE2HS
GND2HS
VCC2HS
OUTHS
VEE2HS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
25
24
23
22
21
20
19
infineon
EiceDRIVER™
2ED020I12-F2
Pin Configuration and FunctionalityPin Functionality
Final Data Sheet 12 Rev. 2.0, 2012-06-05
INHS–, INLS– Inverting Driver Input
INxx- control signal for driver output if INxx+ is set to high (IGBT is on if INxx– = low and INxx+ = high).
A minimum pulse width is defined to make the IC robust against glitches at INxx–. An internal pull-up-resistor
ensures IGBT off-state.
/RSTHS, /RSTLS Reset Input
Function 1: Enable/shutdown of the input chip (The IGBT is off if /RSTxx = low). A minimum pulse width is defined
to make the IC robust against glitches at /RSTxx.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTxx is low for a time TRST. An internal pull-up-
resistor is used to ensure /FLTxx status output.
/FLTHS, /FLTLS Fault Output
Open-drain output to report a desaturation error of the IGBT (/FLTxx is low if desaturation occurs).
RDYHS, RDYLS Ready Status Output
Open-drain output to report the correct operation of the device (RDYxx = high if both chips are above the UVLO
level and the internal chip transmission is faultless).
VCC1HS, VCC1LS Positive Supply
5 V power supply of the input chip
VEE2HS, VEE2LS Negative Supply
Negative power supply pins of the output chip. If no negative supply voltage is available, both pins have to be
connected to GND2xx.
DESATHS, DESATLS Desaturation Detection Input
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high, VCE
is above a defined value and a certain blanking time has expired, the desaturation protection is activated and the
IGBT is switched off. The blanking time is adjustable by an external capacitor.
CLAMPHS, CLAMPLS Miller Clamping
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when the
gate voltage goes 2 V below VEE2xx.
GND2HS, GND2LS Reference Ground
Reference ground of the output chip.
OUTHS, OUTLS Driver Output
Output pin to drive an IGBT. The voltage is switched between VEE2xx and VCC2xx. In normal operating mode
Vout is controlled by INxx+, INxx- and /RSTxx. During error mode (UVLO, internal error or DESATxx Vout is set
to VEE2xx independent of the input control signals.
VCC2HS, VCC2LS Positive Supply
Positive power supply pin of the output side.
@neon +5\/ I rD>m i I ID>
EiceDRIVER™
2ED020I12-F2
Functional DescriptionIntroduction
Final Data Sheet 13 Rev. 2.0, 2012-06-05
4 Functional Description
4.1 Introduction
The 2ED020I12-F2 is an advanced IGBT dual gate driver that can be also used for driving power MOS devices.
Control and protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated driver. The input can be directly connected to a standard 5 V DSP
or microcontroller with CMOS in/output and the output driver are connected to the high side and low side switch.
The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be
avoided. Further, a rail-to-rail output reduces power dissipation.
The device also includes IGBT desaturation protection with FAULT status outputs.
Two READY status outputs reports if the device is supplied and operates correctly.
Figure 4 Application Example Bipolar Supply
4.2 Supply
The driver 2ED020I12-F2 is designed to support two different supply configurations, bipolar supply and unipolar
supply.
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage of
-8V at VEE2, please refer to Figure 4. Negative supply prevents a dynamic turn on due to the additional charge
which is generated from IGBT input capacitance times negative supply voltage. If an appropriate negative supply
voltage is used, connecting CLAMPxx to IGBT gate is redundant and therefore typically not necessary.
GND1
INHS+
INHS-
RDYHS
/FLTHS
/RSTHS
VCC1HS
OUTHS
VCC2HS
GND2HS
CLAMPHS
2ED020I12-F2
DESATHS
+5V
VEE2HS
VCC1LS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
SGND
INHS
INLS
RDY
FLT
RS
OUTLS
VCC2LS
GND2LS
CLAMPLS
DESATLS
VEE2LS
-8V_1
+15V_1
+15V_2
-8V_2
100nF
100nF
2 * 4k7
10R
10R
1k
1k
F
F
F
F
220pF
220pF
@neon W I 475% i I fD>
EiceDRIVER™
2ED020I12-F2
Functional DescriptionInternal Protection Features
Final Data Sheet 14 Rev. 2.0, 2012-06-05
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2. Erratically
dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output is directly
connected to IGBT gate, please refer to Figure 5.
Figure 5 Application Example Unipolar Supply
4.3 Internal Protection Features
4.3.1 Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with undervoltage lockout for all driver outputs as well
as for input section, please see Figure 9.
If the power supply voltage VVCC1xx of the input section drops below VUVLOL1 a turn-off signal is sent to the output
driver before power-down. The IGBT is switched off and the signals at INxx+ and INxx- are ignored as long as
VVCC1xx reaches the power-up voltage VUVLOH1.
If the power supply voltage VVCC2xx of the output driver goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored as long as VVCC2xx reaches the power-up voltage VUVLOH2. VEE2xx is not
monitored, otherwise negative supply voltage range from 0 V to -12 V would not be possible.
4.3.2 READY Status Output
The READY outputs shows the status of three internal protection features.
UVLO of the input chip
UVLO of the output chip after a short delay
Internal signal transmission after a short delay
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
GND1
INHS+
INHS-
RDYHS
/FLTHS
/RSTHS
VCC1HS
OUTHS
VCC2HS
GND2HS
CLAMPHS
2ED020I12-F2
DESATHS
+5V
VEE2HS
VCC1LS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
SGND
INHS
INLS
RDY
FLT
RS
OUTLS
VCC2LS
GND2LS
CLAMPLS
DESATLS
VEE2LS
+15V_1
+15V_2
100nF
100nF
2 * 4k7
10R
10R
1k
1k
F
F
220pF
220pF
infineon
EiceDRIVER™
2ED020I12-F2
Functional DescriptionNon-Inverting and Inverting Inputs
Final Data Sheet 15 Rev. 2.0, 2012-06-05
4.3.3 Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the transmission fails
for a given time, the IGBT is switched off and the READY output reports an internal error.
4.3.4 Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply, IGBT gate is clamped at OUTxx to VEE2xx.
4.4 Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode INxx+ controls the driver output
while INxx- is set to low. At inverting mode INxx- controls the driver output while INxx+ is set to high, please see
Figure 7. A minimum input pulse width is defined to filter occasional glitches.
4.5 Driver Outputs
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight control
of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is stable. Due to
the low internal voltage drop, switching behaviour of the IGBT is predominantly governed by the gate resistor.
Furthermore, it reduces the power to be dissipated by the driver.
4.6 External Protection Features
4.6.1 Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up
and reaches 9 V, the output is driven low. Further, the FAULT output is activated, please refer to Figure 8. A
programmable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a
highly precise internal current source and an external capacitor.
4.6.2 Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes below
typical 2 V (related to VEE2). The clamp is designed for a Miller current up to 2 A.
4.6.3 Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUTxx and CLAMPxx limits this voltage to a value slightly higher than
the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of this
paths. If higher currents are expected or a tighter clamping is desired external Schottky diodes may be added.
4.7 RESET
The reset inputs have two functions.
Firstly, /RSTxx is in charge of setting back the FAULT output. If /RSTxx is low longer than a given time, /FLTxx will
be cleared at the rising edge of /RSTxx; otherwise, it will remain unchanged. Moreover, it works as
enable/shutdown of the input logic.
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersAbsolute Maximum Ratings
Final Data Sheet 16 Rev. 2.0, 2012-06-05
5 Electrical Parameters
5.1 Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to destruction of
the integrated circuit. Unless otherwise noted all parameters refer to GND1. The specification for all driver
signals is valid for HS and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals
from driver output side are measured with respect to their specific GND2HS or GND2LS.
Table 2 Absolute Maximum Ratings
Parameter Symbol Values Unit Note /
Test Condition
Min. Max.
Positive power supply output side VVCC2 -0.3 20 V 1)
Negative power supply output side VVEE2 -12 0.3 V 1)
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2 –28V
Gate driver output VOUT VVEE2-0.3 Vmax2+0.3 V
Gate driver high output maximum
current
IOUT 2.4 A t = 2 µs
Gate & Clamp driver low output
maximum current
IOUT 2.4 A t = 2 µs
Maximum short circuit clamping time tCLP –10μsICLAMP/OUT = 500 mA
Positive power supply input side VVCC1 -0.3 6.5 V –
Logic input voltages
(IN+,IN-,RST)
VLogicIN -0.3 6.5 V –
Opendrain Logic output voltage (FLT)VFLT# -0.3 6.5 V –
Opendrain Logic output voltage
(RDY)
VRDY -0.3 6.5 V –
Opendrain Logic output current (FLT)IFLT# –10mA
Opendrain Logic output current (RDY) IRDY –10mA
Pin DESAT voltage VDESAT -0.3 VVCC2 +0.3 V 1)
Pin CLAMP voltage VCLAMP -0.3 VVCC2 +0.32) °C 3)
Input to output isolation voltage
(GND2)
VISO -1200 1200 V
Output to output isolation voltage
(GND2HS vs GND2LS)
VISO_OUT -1200 1200 V 1)
Junction temperature TJ-40 150 °C –
Storage temperature TS-55 150 °C –
Power dissipation, per input part PD, IN –100mW
4) @TA = 25°C
Power dissipation, per output part PD, OUT –400mW
4) @TA = 25°C
Power dissipation, total PD, tot 1000 mW 4) @TA = 25°C
infineon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersAbsolute Maximum Ratings
Final Data Sheet 17 Rev. 2.0, 2012-06-05
Thermal resistance (Input part) RTHJA,IN –375K/W
4) @TA = 25°C,
PD, IN_HS+LS =
200 mW,
PD, OUT_HS+LS =
800 mW
Thermal resistance (Output part) RTHJA,OUT –110K/W
4) @TA = 25°C,
PD, IN_HS+LS =
200 mW,
PD, OUT_HS+LS =
800 mW
ESD Capability VESD 1 kV Human Body Model5)
1) With respect to GND2.
2) May be exceeded during short circuit clamping.
3) With respect to VEE2.
4) IC power dissipation is derated linearly at 11.8 mW/°C above 65°C. Thermal performance may change significantly with
layout and heat dissipation of components in close proximity.
5) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 k series resistor).
Table 2 Absolute Maximum Ratings (cont’d)
Parameter Symbol Values Unit Note /
Test Condition
Min. Max.
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersOperating Parameters
Final Data Sheet 18 Rev. 2.0, 2012-06-05
5.2 Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless otherwise
noted all parameters refer to GND1. The specification for all driver signals is valid for HS and LS with out
special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side are measured
with respect to their specific GND2HS or GND2LS.
5.3 Recommended Operating Parameters
Note: Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS
and LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output side
are measured with respect to their specific GND2HS or GND2LS.
Table 3 Operating Parameters
Parameter Symbol Values Unit Note /
Test Condition
Min. Max.
Positive power supply output side VVCC2 13 20 V 1)
1) With respect to GND2.
Negative power supply output side VVEE2 -12 0 V 1)
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2 –28V
Positive power supply input side VVCC1 4.5 5.5 V –
Logic input voltages
(IN+,IN-,RST)
VLogicIN -0.3 5.5 V –
Pin CLAMP voltage VCLAMP VVEE2-0.3 VVCC2
2)
2) May be exceeded during short circuit clamping.
V–
Pin DESAT voltage VDESAT -0.3 VVCC2 V1)
Pin TLSET voltage VTLSET -0.3 VVCC2 V1)
Ambient temperature TA-40 125 °C –
Common mode transient immunity3)
3) The parameter is not subject to production test - verified by design/characterization
|DVISO/dt| – 50 kV/μs@ 500V
Table 4 Recommended Operating Parameters
Parameter Symbol Value Unit Note / Test Condition
Positive power supply output side VVCC2 15 V 1)
1) With respect to GND2.
Negative power supply output side VVEE2 -8 V 1)
Positive power supply input side VVCC1 5V–
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 19 Rev. 2.0, 2012-06-05
5.4 Electrical Characteristics
Note: The electrical characteristics involve the spread of values for the supply voltages, load and junction
temperatures given below. Typical values represent the median values, which are related to production
processes at T = 25°C. Unless otherwise noted all voltages are given with respect to GND. The specification
for all driver signals is valid for HS and LS with out special notic, e.g. IN+ covers INHS+ as well as INLS+.
The signals from driver output side are measured with respect to their specific GND2HS or GND2LS.
5.4.1 Voltage Supply
Table 5 Voltage Supply
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
UVLO Threshold Input
Chip
VUVLOH1 –4.14.3V
VUVLOH1 3.5 3.8 – V
UVLO Hysteresis Input
Chip (VUVLOH1 - VUVLOL1)
VHYS1 0.15 V –
UVLO Threshold Output
Chip
VUVLOH2 –12.012.6V
VUVLOL2 10.4 11.0 V –
UVLO Hysteresis Output
Chip (VUVLOH1 - VUVLOL1)
VHYS2 0.7 0.9 – V
Quiescent Current Input
Chip
IQ1 –79mAVVCC1 = 5 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Quiescent Current
Output Chip
IQ2 –46mAVVCC2 = 15 V
VVEE2 = -8 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 20 Rev. 2.0, 2012-06-05
5.4.2 Logic Input and Output
Table 6 Logic Input and Output
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
IN+,IN-, RST Low Input Voltage VIN+L,
VIN-L,
VRSTL#
––1.5V
IN+,IN-, RST High Input Voltage VIN+H,
VIN-H,
VRSTH#
3.5––V
IN-, RST Input Current IIN-, IRST# -400 -100 – μAVIN- = GND1
VRST# = GND1
IN+ Input Current IIN+, 100 400 μAVIN+ = VCC1
RDY,FLT Pull Up Current IPRDY, IPFLT# -400 -100 – μAVRDY = GND1
VFLT# = GND1
Input Pulse Suppression IN+,
IN-
TMININ+,
TMININ-
30 40 ns –
Input Pulse Suppression RST
for ENABLE/SHUTDOWN
TMINRST 30 40 ns –
Pulse Width RST
for Reseting FLT
TRST 800––ns
FLT Low Voltage VFLTL ––300mVISINK(FLT#) = 5 mA
RDY Low Voltage VRDYL ––300mVISINK(RDY) = 5 mA
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 21 Rev. 2.0, 2012-06-05
5.4.3 Gate Driver
5.4.4 Active Miller Clamp
Table 7 Gate Driver
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
High Level Output
Voltage
VOUTH1 VCC2 -1.2 VCC2 -0.8 V IOUTH = -20 mA
VOUTH2 VCC2 -2.5 VCC2 -2.0 – V IOUTH = -200 mA
VOUTH3 VCC2 -9 VCC2 -5 – V IOUTH = -1 A
VOUTH4 VCC2 -10 – V IOUTH = -2 A
High Level Output Peak
Current
IOUTH -1.5 -2.0 A IN+ = High,
IN- = Low;
OUT = High
Low Level Output
Voltage
VOUTL1 VVEE2 +0.04 VVEE2+0.09 V IOUTL = 20 mA
VOUTL2 VVEE2 +0.3 VVEE2+0.85 V IOUTL = 200 mA
VOUTL3 VVEE2 +2.1 VVEE2+5 V IOUTL = 1 A
VOUTL4 VVEE2 +7 V IOUTL = 2 A
Low Level Output Peak
Current
IOUTL 1.5 2.0 A IN+ = Low,
IN- = Low;
OUT = Low,
VVCC2 = 15 V,
VVEE2 = -8 V
Table 8 Active Miller Clamp
Parameter Symbol Values Unit Note / Test Condition
Min. Typ. Max.
Low Level Clamp
Voltage
VCLAMPL1 VVEE2+0.03 VVEE2 +0.08 V IOUTL = 20 mA
VCLAMPL2 VVEE2+0.3 VVEE2 +0.8 V IOUTL = 200 mA
VCLAMPL3 VVEE2+1.9 VVEE2 +4.8 V IOUTL = 1 A
Low Level Clamp
Current
ICLAMPL 2––A
1)
1) The parameter is not subject to production test - verified by design/characterization
Clamp Threshold
Voltage
VCLAMP 1.6 2.1 2.4 V Related to VEE2
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 22 Rev. 2.0, 2012-06-05
5.4.5 Short Circuit Clamping
5.4.6 Dynamic Characteristics
Dynamic characteristics are measured with VVCC1 = 5 V, VVCC2 = 15 V and VVEE2 = -8 V.
Table 9 Short Circuit Clamping
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Clamping voltage (OUT)
(VOUT - VVCC2)
VCLPout 0.8 1.3 V IN+ = High,
IN- = Low,
OUT = High
IOUT = 500 mA
pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP) (VVCLAMP-VVCC2)
VCLPclamp 1.3 V IN+ = High,
IN- = Low,
OUT = High
ICLAMP = 500 mA
(pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP)
VCLPclamp 0.7 1.1 V IN+ = High,
IN- = Low,
OUT = High
ICLAMP = 20 mA
Table 10 Dynamic Characteristics
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
IN+, IN- input to output
propa-gation delay ON
TPDON 145 170 195 ns CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @ 25°C
IN+, IN- input to output
propa-gation delay OFF
TPDOFF 145 165 190 ns
IN+, IN- input to output
propa-gation delay
distortion (TPDOFF - TPDON)
TPDISTO -35 -5 25 ns
IN+, IN- input to output
propagation delay ON
variation due to temp
TPDONt ––25ns
1) CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
IN+, IN- input to output
propagation delay OFF
variation due to temp
TPDOFFt ––40ns
1) CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
IN+, IN- input to output
propagation delay
distortion variation due to
temp (TPDOFF-TPDON)
TPDISTOt ––20ns
1) CLOAD = 100 pF
VIN+ = 50%,
VOUT=50%
@neon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 23 Rev. 2.0, 2012-06-05
5.4.7 Desaturation Protection
Rise Time TRISE 10 30 60 ns CLOAD = 1 nF
VL 10%, VH 90%
200 400 800 ns CLOAD = 34 nF
VL 10%, VH 90%
Fall Time TFALL 10 50 90 ns CLOAD = 1 nF
VL 10%, VH 90%
200 350 600 ns CLOAD = 34 nF
VL 10%, VH 90%
1) The parameter is not subject to production test - verified by design/characterization
Table 11 Desaturation Protection
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Blanking Capacitor
Charge Current
IDESATC 450 500 550 μAVVCC2 =15 V,
VVEE2=- 8 V
VDESAT = 2 V
Blanking Capacitor
Discharge Current
IDESATD 914–mAVVCC2 =15 V,
VVEE2 = -8 V
VDESAT = 6 V
Desaturation Reference
Level
VDESAT 8.39 9.5VVVCC2 = 15 V
Desaturation Filter Time TDESATfilter –250–nsVVCC2 = 15 V,
VVEE2 = -8 V
VDESAT = 9 V
Desaturation Sense to
OUT Low Delay
TDESATOUT 350 430 ns VOUT = 90%
CLOAD = 1 nF
Desaturation Sense to
FLT Low Delay
TDESATFLT ––2.25μsVFLT# = 10%;
IFLT # = 5 mA
Desaturation Low
Voltage
VDESATL 0.4 0.6 0.95 V IN+ = Low, IN- = Low,
OUT = Low
Leading edge blanking TDESATleb 400 ns Not subject of
production test
Table 10 Dynamic Characteristics (cont’d)
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
infineon
EiceDRIVER™
2ED020I12-F2
Electrical ParametersElectrical Characteristics
Final Data Sheet 24 Rev. 2.0, 2012-06-05
5.4.8 Active Shut Down
Table 12 Active Shut Down
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Active Shut Down Voltage VACTSD
1)
1) With reference to VEE2
––2.0VIOUT = -200 mA,
VCC2 open
@neon
EiceDRIVER™
2ED020I12-F2
Timing DiagrammsElectrical Characteristics
Final Data Sheet 25 Rev. 2.0, 2012-06-05
6Timing Diagramms
Figure 6 Propagation Delay, Rise and Fall Time
Figure 7 Typical Switching Behavior
OUT
/RST
IN+
IN-
@neon
EiceDRIVER™
2ED020I12-F2
Timing DiagrammsElectrical Characteristics
Final Data Sheet 26 Rev. 2.0, 2012-06-05
Figure 8 DESAT Switch-Off Behavior
Figure 9 UVLO Behavior
V
DESAT
typ. 9V
>T
RSTmin
OUT
DESAT
IN+
/FLT
/RST
T
PD ON
T
DESATFLT
T
DESATOUT
T
DESATfilter
T
DESATleb
T
PD ON
T
DESATleb
T
PD OFF
blanking time
OUT
/RST
IN+
VCC2
VCC1
RDY
/FLT
ESD diode conduction
V
UVLOH2
V
UVLOL2
V
UVLOH1
V
UVLOL1
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EiceDRIVER™
2ED020I12-F2
Package OutlinesElectrical Characteristics
Final Data Sheet 27 Rev. 2.0, 2012-06-05
7 Package Outlines
Figure 10 PG-DSO-36-58 (Plastic (Green) Dual Small Outline Package)
0.504
0.104
0.016
0.013
0.417
0.299
0.035
0.018
MILLIMETERS
L
T1
h
ccc
F3
F2
F1
ddd
D
DIM
A2
A
b
c
E
E1
N
e
-
MIN
32
0.020
0.004
0.007
0.010
0° 8°
2.45
MAX
INCHES
32
0.026 BSC
0.496
MIN
-
0.089
0.010
0.009
0.394
0.291
MAX
0.096
SCALE
1.0
0
2mm
0
1.0
2.25
2.65
0.41
0.32
12.80
10.60
7.607.40
10.00
12.60
0.23
0.25
0.900.50
0.450.25
0.17
0.10
0.65 BSC
02
ISSUE DATE
25.03.2011
DOCUMENT NO.
Z8B00159298
EUROPEAN PROJECTION
REVISION
9.73
0.45
1.67
0.383
0.018
0.066
FOOTPRINT
A1 0.20 0.004 0.008
0.10
T
Published by Infineon Technologies AG
www.infineon.com

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